Such a differential pair arrangement is already known in the art, e.g. from the book `Analysis and Design of Analog Integrated Circuits` by P. R. Gray and R. G. Meyer, J. Wiley & Sons, New York, 1977, and more particularly from FIG. 3.29 thereof. Therein, both the first and second impedances comprise resistors. More particularly, these second impedances are emitter degeneration resistor and cause the differential pair arrangement to operate with a lower distortion, i.e. with a higher operation linearity as they introduce feedback. Indeed, from the above book it follows that the open loop gain of the arrangement is equal to the product of the emitter degeneration resistor value and the so-called transconductance (g.sub.m) of the transistors so that when this open loop gain, the distortion of the differential pair arrangement decreases and the operation linearity of this arrangement increases. This means that an increased linearity of the differential pair arrangement may be obtained by increasing either the emitter degeneration resistor value or the transconductance value. However, increasing the emitter degeneration resistor value also increases the so-called thermal noise introduced in the differential pair arrangement by this resistor, this thermal noise being proportional to the resistor value. On the other hand, increasing the transconductance value requires increasing the DC current through the transistors. However, because this DC current also flows through the first and the second impedances it produces additional DC voltage drops therein. Thus, increasing the DC current through the transistors implies providing a higher supply voltage for the differential pair arrangement. Secondly, producing a higher DC current through the transistors also increases the input offset voltage of the differential pair arrangement, since this input offset voltage is partly caused by the mismatch between the emitter degeneration resistors of both first branches, this mismatch resulting in an offset voltage equal to the product of the mismatch and the DC current through the emitter degeneration resistors.